4 lessons
Pipelining: doing laundry for four people at once
A single-cycle CPU wastes enormous amounts of time. Pipelining fixes it with the same trick as an assembly line - and comes with the same one big catch.
Data hazards: when the next instruction needs a value that isn't ready yet
Pipelining assumed independent instructions. Real programs constantly break that assumption - here's exactly how, and the clever wiring trick called forwarding that fixes most of it for free.
Control hazards: when the pipeline doesn't even know what to fetch next
Branches don't just delay a value like data hazards do - they delay knowing which instruction comes next at all. Here's how stalling, delay slots and branch prediction each deal with that.
Measuring pipeline performance, and going beyond one instruction per cycle
CPI ties every hazard from this module into one number you can actually calculate with. Then we look at what happens once one pipeline isn't enough anymore.