How does binary represent negative numbers?

There are no minus signs inside a computer. Here's how two's complement lets addition hardware handle negative numbers for free.

10 min readUpdated 2026-09-03computer-architecturenumber-systemstwos-complement

The problem: there's no minus key on a switch

A transistor can be on or off. It cannot be "minus on." So how does a computer represent $-5$ , when all it has are 1s and 0s? This turns out to be one of the cleverest small ideas in all of computing.

Attempt 1: sign-and-magnitude (and why it's clunky)

The most obvious idea: reserve the leftmost bit to mean "sign" (0 = positive, 1 = negative), and use the rest for the magnitude. In 4 bits,

+5

would be 0101 and

-5

would be 1101. This works for reading numbers, but breaks addition hardware. If you feed 0101 (+5) and 1101 (-5) into an ordinary binary adder expecting the result to be zero, you get 10010, garbage. The adder would need a completely separate subtraction circuit and a bunch of special-case logic to check signs first. That's expensive silicon for something that should be simple. There's also an annoying side effect: both 0000 (+0) and 1000 (-0) exist. Two representations for zero is wasted space and a constant source of bugs.

Attempt 2: two's complement (what real computers use)

Two's complement fixes both problems with one trick. To negate a number:

Flip every bit (this is called the one's complement).
Add 1 to the result.

Let's negate $5 = 0101_2$ (using 4 bits):

$0101 \xrightarrow{\text{flip bits}} 1010 \xrightarrow{\text{add } 1} 1011$

-5

is represented as 1011 in 4-bit two's complement. Let's sanity check by adding

5 + (-5)

using ordinary binary addition, no special hardware:

code

  0101   (5)
+ 1011   (-5)
------
 10000

The result is 10000, but we only have 4 bits available, so the leading 1 "falls off the edge" (this is called overflow discard, and it's expected here), leaving 0000 — exactly zero. The exact same adder circuit that adds positive numbers also correctly handles negative numbers, with no special-case logic. That's the entire reason two's complement won: it makes subtraction just "addition of a negated number," so a computer only ever needs to build one arithmetic circuit, the adder.

Why does flip-and-add-1 work? The math

The core idea: in an $n$ -bit system, two's complement represents $-x$ as $2^n - x$ . Check with $n=4$ , $x=5$ : $2^4 - 5 = 16 - 5 = 11 = 1011_2$ . Matches what we computed above.

Why does "flip bits, then add 1" compute $2^n - x$ ? Flipping every bit of $x$ produces $(2^n - 1) - x$ , since flipping all bits of any $n$ -bit number always gives you "all 1s minus that number" ( $1111_2 = 15 = 2^4-1$ is the biggest 4-bit value). Adding 1 to that gives $(2^n - 1 - x) + 1 = 2^n - x$ , exactly the negation we wanted.

Reading the sign of a two's complement number

The leftmost bit still tells you the sign, but now it also carries real place-value weight instead of being a separate flag. For an $n$ -bit two's complement number, the value is:

$N = -b_{n-1} \times 2^{n-1} + \sum_{i=0}^{n-2} b_i \times 2^i$

Notice the leading bit's weight is negative. Check 1011 (

n=4

-1\times 8 + 0\times4 + 1\times2 + 1\times1 = -8+0+2+1=-5

. Matches.

The range of two's complement

With

n

bits, two's complement represents exactly

2^n

values total (same count as unsigned), but split asymmetrically: from

-2^{n-1}

2^{n-1}-1

. For 4 bits:

-8

+7

(16 total values). There's exactly one representation of zero (0000), and one extra negative number (

-8

) that has no positive counterpart, because zero "used up" one of the positive slots.

$\text{range} = \left[-2^{n-1}, \; 2^{n-1}-1\right]$

For the 32-bit integers most programming languages use by default, this is $-2{,}147{,}483{,}648$ to $2{,}147{,}483{,}647$ — the reason integer overflow bugs happen right around ±2.1 billion.

Common mistakes

Forgetting to add the 1 after flipping bits. Flipping alone gives one's complement, which still has the two-zeros problem and doesn't make plain addition work correctly.
Reading the sign bit as a magnitude bit. In 1011, the leading 1 is worth $-8$ , not $+8$ — this is the single most common two's complement mistake.
Assuming the range is symmetric. An 8-bit signed byte goes from $-128$ to $+127$ , not $-127$ to $+127$ — there's no positive match for the most negative value.

Summary

Two's complement represents $-x$ as $2^n - x$ , computed practically by flipping every bit and adding 1. Its entire purpose is letting the same adder circuit handle both addition and subtraction, with no special-case hardware and only one representation of zero. The leftmost bit carries a negative place value of $-2^{n-1}$ , giving an $n$ -bit range of $[-2^{n-1}, 2^{n-1}-1]$ . This is the representation every modern CPU uses for signed integers.

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How does binary represent negative numbers?

There are no minus signs inside a computer. Here's how two's complement lets addition hardware handle negative numbers for free.

10 min readUpdated 2026-09-03computer-architecturenumber-systemstwos-complement

The problem: there's no minus key on a switch

Attempt 1: sign-and-magnitude (and why it's clunky)

The most obvious idea: reserve the leftmost bit to mean "sign" (0 = positive, 1 = negative), and use the rest for the magnitude. In 4 bits,

+5

would be 0101 and

-5

Attempt 2: two's complement (what real computers use)

Two's complement fixes both problems with one trick. To negate a number:

Flip every bit (this is called the one's complement).
Add 1 to the result.

Let's negate $5 = 0101_2$ (using 4 bits):

$0101 \xrightarrow{\text{flip bits}} 1010 \xrightarrow{\text{add } 1} 1011$

-5

is represented as 1011 in 4-bit two's complement. Let's sanity check by adding

5 + (-5)

using ordinary binary addition, no special hardware:

code

  0101   (5)
+ 1011   (-5)
------
 10000

Why does flip-and-add-1 work? The math

The core idea: in an $n$ -bit system, two's complement represents $-x$ as $2^n - x$ . Check with $n=4$ , $x=5$ : $2^4 - 5 = 16 - 5 = 11 = 1011_2$ . Matches what we computed above.

Reading the sign of a two's complement number

The leftmost bit still tells you the sign, but now it also carries real place-value weight instead of being a separate flag. For an $n$ -bit two's complement number, the value is:

$N = -b_{n-1} \times 2^{n-1} + \sum_{i=0}^{n-2} b_i \times 2^i$

Notice the leading bit's weight is negative. Check 1011 (

n=4

-1\times 8 + 0\times4 + 1\times2 + 1\times1 = -8+0+2+1=-5

. Matches.

The range of two's complement

With

n

bits, two's complement represents exactly

2^n

values total (same count as unsigned), but split asymmetrically: from

-2^{n-1}

2^{n-1}-1

. For 4 bits:

-8

+7

(16 total values). There's exactly one representation of zero (0000), and one extra negative number (

-8

) that has no positive counterpart, because zero "used up" one of the positive slots.

$\text{range} = \left[-2^{n-1}, \; 2^{n-1}-1\right]$

For the 32-bit integers most programming languages use by default, this is $-2{,}147{,}483{,}648$ to $2{,}147{,}483{,}647$ — the reason integer overflow bugs happen right around ±2.1 billion.

Common mistakes

Forgetting to add the 1 after flipping bits. Flipping alone gives one's complement, which still has the two-zeros problem and doesn't make plain addition work correctly.
Reading the sign bit as a magnitude bit. In 1011, the leading 1 is worth $-8$ , not $+8$ — this is the single most common two's complement mistake.
Assuming the range is symmetric. An 8-bit signed byte goes from $-128$ to $+127$ , not $-127$ to $+127$ — there's no positive match for the most negative value.